Fibre Channel Verification
IP
FC Verification Engine implements has
the complete FCP2 stack (FC1 to FC4 layers) that can
be used to drive FC Packets and respond to FC traffic
with abstraction all the way up to the application layer.
The Engine issues SCSI commands that are converted into
FC frame sequences that are transmitted over the link.
Various interfaces are supported at the PHY/Link level:
1-bit, 10-bit, 20-bit, 40-bit, or frame level. Thus,
the stack can be used to test a HDL based design (signal/wire
level) or a high-level architectural model of the design
(frame level).
Highlights
- Complete Functional Verification Engine for test
generation and FC protocol checking and monitoring
- FC Compliance Suite (>200 tests) compatible
with FC-0, FC-1, FC-2, and FC-4)
- Verifies all protocol layers (FC-0, FC-1, FC-2,
and FC-4 )
- Directed and Randomized Test Generation
- Directed and Randomized Error Injection capability
- Callback functionality
- Programmable parameters through Knobs
- Support for Various Link Speeds (1G, 2G and 4G)
- User configurable Test reports for logging events
and transactions
- Interoperable with various Verification Environments
like NC-Sim, Specman, VERA, VCS, ModelSim etc
- Selectable Pin Interface
- Multiple Language Interface like Verilog, VHDL,
C/C++, SystemC, ‘e’, VERA, SystemVerilog
Product Components
- FC Verification Engine
- FC Bus Functional Models
- Directed & Random tests generator
- FC SanMark Compliance Test Suite
- FC SystemVerilog Assertions
- Error injector
- Report generator
- FC Transaction generator
- Protocol Checker
- Protocol Monitor
For more information on each component and evaluation
copy please email to: info@perfectus.com
or sales@perfectus.com
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